SectionVendorTokens."skl_tokens" {
	SKL_TKN_UUID "1"
	SKL_TKN_U8_NUM_BLOCKS "2"
	SKL_TKN_U8_BLOCK_TYPE "3"
	SKL_TKN_U8_IN_PIN_TYPE "4"
	SKL_TKN_U8_OUT_PIN_TYPE "5"
	SKL_TKN_U8_DYN_IN_PIN "6"
	SKL_TKN_U8_DYN_OUT_PIN "7"
	SKL_TKN_U8_IN_QUEUE_COUNT "8"
	SKL_TKN_U8_OUT_QUEUE_COUNT "9"
	SKL_TKN_U8_TIME_SLOT "10"
	SKL_TKN_U8_CORE_ID "11"
	SKL_TKN_U8_MODULE_TYPE "12"
	SKL_TKN_U8_CONN_TYPE "13"
	SKL_TKN_U8_DEV_TYPE "14"
	SKL_TKN_U8_HW_CONN_TYPE "15"
	SKL_TKN_U16_MOD_INST_ID "16"
	SKL_TKN_U16_BLOCK_SIZE "17"
	SKL_TKN_U32_MAX_MCPS "18"
	SKL_TKN_U32_MEM_PAGES "19"
	SKL_TKN_U32_OBS "20"
	SKL_TKN_U32_IBS "21"
	SKL_TKN_U32_VBUS_ID "22"
	SKL_TKN_U32_PARAMS_FIXUP "23"
	SKL_TKN_U32_CONVERTER "24"
	SKL_TKN_U32_PIPE_ID "25"
	SKL_TKN_U32_PIPE_CONN_TYPE "26"
	SKL_TKN_U32_PIPE_PRIORITY "27"
	SKL_TKN_U32_PIPE_MEM_PGS "28"
	SKL_TKN_U32_DIR_PIN_COUNT "29"
	SKL_TKN_U32_FMT_CH "30"
	SKL_TKN_U32_FMT_FREQ "31"
	SKL_TKN_U32_FMT_BIT_DEPTH "32"
	SKL_TKN_U32_FMT_SAMPLE_SIZE "33"
	SKL_TKN_U32_FMT_CH_CONFIG "34"
	SKL_TKN_U32_FMT_INTERLEAVE "35"
	SKL_TKN_U32_FMT_SAMPLE_TYPE "36"
	SKL_TKN_U32_FMT_CH_MAP "37"
	SKL_TKN_U32_PIN_MOD_ID "38"
	SKL_TKN_U32_PIN_INST_ID "39"
	SKL_TKN_U32_MOD_SET_PARAMS "40"
	SKL_TKN_U32_MOD_PARAM_ID "41"
	SKL_TKN_U32_CAPS_SET_PARAMS "42"
	SKL_TKN_U32_CAPS_PARAMS_ID "43"
	SKL_TKN_U32_CAPS_SIZE "44"
	SKL_TKN_U32_PROC_DOMAIN "45"
	SKL_TKN_U32_LIB_COUNT "46"
	SKL_TKN_STR_LIB_NAME "47"
}

SectionVendorTuples."media0_in cpr 0 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."media0_in cpr 0_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."media0_in cpr 0" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "5"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "0"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "1"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."media0_in mi num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."media0_in mi_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "420"
	}
}

SectionVendorTuples."media0_in mi" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
		73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "1"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "0"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "6"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "0"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "1"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."codec0_in cpr 1 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."codec0_in cpr 1_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."codec0_in cpr 1" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "2"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "2"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "1"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0x5"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "2"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."codec0_in mi num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."codec0_in mi_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "420"
	}
}

SectionVendorTuples."codec0_in mi" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
		73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "1"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "0"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "6"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "1"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "2"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."codec0_out mo num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."codec0_out mo_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "1092"
	}
}

SectionVendorTuples."codec0_out mo" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
		143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "8"
		SKL_TKN_U8_OUT_QUEUE_COUNT "1"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "0"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "6"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "0"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "3"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "16"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_2" {
		SKL_TKN_U32_DIR_PIN_COUNT "32"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_3" {
		SKL_TKN_U32_DIR_PIN_COUNT "48"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_4" {
		SKL_TKN_U32_DIR_PIN_COUNT "64"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_5" {
		SKL_TKN_U32_DIR_PIN_COUNT "80"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_6" {
		SKL_TKN_U32_DIR_PIN_COUNT "96"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_7" {
		SKL_TKN_U32_DIR_PIN_COUNT "112"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "16"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_2" {
		SKL_TKN_U32_DIR_PIN_COUNT "32"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_3" {
		SKL_TKN_U32_DIR_PIN_COUNT "48"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_4" {
		SKL_TKN_U32_DIR_PIN_COUNT "64"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_5" {
		SKL_TKN_U32_DIR_PIN_COUNT "80"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_6" {
		SKL_TKN_U32_DIR_PIN_COUNT "96"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_7" {
		SKL_TKN_U32_DIR_PIN_COUNT "112"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."codec0_out cpr 2 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."codec0_out cpr 2_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."codec0_out cpr 2" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "2"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "2"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "2"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0x5"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "3"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."media0_out mo num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."media0_out mo_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "1092"
	}
}

SectionVendorTuples."media0_out mo" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
		143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "8"
		SKL_TKN_U8_OUT_QUEUE_COUNT "1"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "0"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "6"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "1"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "4"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "16"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_2" {
		SKL_TKN_U32_DIR_PIN_COUNT "32"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_3" {
		SKL_TKN_U32_DIR_PIN_COUNT "48"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_4" {
		SKL_TKN_U32_DIR_PIN_COUNT "64"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_5" {
		SKL_TKN_U32_DIR_PIN_COUNT "80"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_6" {
		SKL_TKN_U32_DIR_PIN_COUNT "96"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_7" {
		SKL_TKN_U32_DIR_PIN_COUNT "112"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "16"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_2" {
		SKL_TKN_U32_DIR_PIN_COUNT "32"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_3" {
		SKL_TKN_U32_DIR_PIN_COUNT "48"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_4" {
		SKL_TKN_U32_DIR_PIN_COUNT "64"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_5" {
		SKL_TKN_U32_DIR_PIN_COUNT "80"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_6" {
		SKL_TKN_U32_DIR_PIN_COUNT "96"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_7" {
		SKL_TKN_U32_DIR_PIN_COUNT "112"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."media0_out cpr 3 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."media0_out cpr 3_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."media0_out cpr 3" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "5"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "3"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "4"
		SKL_TKN_U32_CONVERTER "4"
		SKL_TKN_U32_PIPE_ID "4"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."dmic01_hifi_in cpr 4 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."dmic01_hifi_in cpr 4_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."dmic01_hifi_in cpr 4" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "2"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "1"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "4"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0x0"
		SKL_TKN_U32_PARAMS_FIXUP "4"
		SKL_TKN_U32_CONVERTER "4"
		SKL_TKN_U32_PIPE_ID "5"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."dmic01_hifi_in mi num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."dmic01_hifi_in mi_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "420"
	}
}

SectionVendorTuples."dmic01_hifi_in mi" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
		73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "1"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "0"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "6"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "2"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "5"
		SKL_TKN_U32_PIPE_CONN_TYPE "0"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."codec1_out mo num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."codec1_out mo_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "1092"
	}
}

SectionVendorTuples."codec1_out mo" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
		143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "8"
		SKL_TKN_U8_OUT_QUEUE_COUNT "1"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "0"
		SKL_TKN_U8_CONN_TYPE "0"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "6"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "2"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "6"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "16"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_2" {
		SKL_TKN_U32_DIR_PIN_COUNT "32"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_3" {
		SKL_TKN_U32_DIR_PIN_COUNT "48"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_4" {
		SKL_TKN_U32_DIR_PIN_COUNT "64"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_5" {
		SKL_TKN_U32_DIR_PIN_COUNT "80"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_6" {
		SKL_TKN_U32_DIR_PIN_COUNT "96"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_fmt_7" {
		SKL_TKN_U32_DIR_PIN_COUNT "112"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "16"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_2" {
		SKL_TKN_U32_DIR_PIN_COUNT "32"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_3" {
		SKL_TKN_U32_DIR_PIN_COUNT "48"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_4" {
		SKL_TKN_U32_DIR_PIN_COUNT "64"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_5" {
		SKL_TKN_U32_DIR_PIN_COUNT "80"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_6" {
		SKL_TKN_U32_DIR_PIN_COUNT "96"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.in_pin_7" {
		SKL_TKN_U32_DIR_PIN_COUNT "112"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."codec1_out cpr 5 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."codec1_out cpr 5_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."codec1_out cpr 5" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "2"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "2"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "5"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0x5"
		SKL_TKN_U32_PARAMS_FIXUP "0"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "6"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."hdmi1_pt_out cpr 6 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."hdmi1_pt_out cpr 6_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."hdmi1_pt_out cpr 6" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "5"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "6"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "7"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "7"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."hdmi1_pt_out cpr 7 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."hdmi1_pt_out cpr 7_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."hdmi1_pt_out cpr 7" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "4"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "7"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "7"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "7"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."hdmi2_pt_out cpr 8 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."hdmi2_pt_out cpr 8_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."hdmi2_pt_out cpr 8" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "5"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "8"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "7"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "8"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."hdmi2_pt_out cpr 9 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."hdmi2_pt_out cpr 9_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."hdmi2_pt_out cpr 9" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "4"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "9"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "7"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "8"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."hdmi3_pt_out cpr 10 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."hdmi3_pt_out cpr 10_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."hdmi3_pt_out cpr 10" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "5"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "10"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "7"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "9"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."hdmi3_pt_out cpr 11 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."hdmi3_pt_out cpr 11_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."hdmi3_pt_out cpr 11" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "1"
		SKL_TKN_U8_HW_CONN_TYPE "1"
		SKL_TKN_U8_DEV_TYPE "4"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "11"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "384"
		SKL_TKN_U32_IBS "384"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "7"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "9"
		SKL_TKN_U32_PIPE_CONN_TYPE "1"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "2"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
		SKL_TKN_U32_FMT_CH_CONFIG "0x1"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."mch_cap_in cpr 12 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."mch_cap_in cpr 12_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."mch_cap_in cpr 12" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "2"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "1"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "12"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "200000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "768"
		SKL_TKN_U32_IBS "768"
		SKL_TKN_U32_VBUS_ID "0x0"
		SKL_TKN_U32_PARAMS_FIXUP "4"
		SKL_TKN_U32_CONVERTER "0"
		SKL_TKN_U32_PIPE_ID "10"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "4"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
		SKL_TKN_U32_FMT_CH_CONFIG "0x5"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "4"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
		SKL_TKN_U32_FMT_CH_CONFIG "0x5"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "4"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
		SKL_TKN_U32_FMT_CH_CONFIG "0x5"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."mch_cap_in cpr 13 num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."mch_cap_in cpr 13_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "516"
	}
}

SectionVendorTuples."mch_cap_in cpr 13" {
	tokens "skl_tokens"

	tuples."uuid" {
		SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
		131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
	}

	tuples."byte.u8_data" {
		SKL_TKN_U8_IN_PIN_TYPE "0"
		SKL_TKN_U8_OUT_PIN_TYPE "0"
		SKL_TKN_U8_IN_QUEUE_COUNT "1"
		SKL_TKN_U8_OUT_QUEUE_COUNT "2"
		SKL_TKN_U8_DYN_IN_PIN "1"
		SKL_TKN_U8_DYN_OUT_PIN "1"
		SKL_TKN_U8_TIME_SLOT "0"
		SKL_TKN_U8_CORE_ID "0"
		SKL_TKN_U8_MODULE_TYPE "1"
		SKL_TKN_U8_CONN_TYPE "2"
		SKL_TKN_U8_HW_CONN_TYPE "2"
		SKL_TKN_U8_DEV_TYPE "5"
	}

	tuples."short.u16_data" {
		SKL_TKN_U16_MOD_INST_ID "13"
	}

	tuples."word.u32_data" {
		SKL_TKN_U32_MAX_MCPS "100000"
		SKL_TKN_U32_MEM_PAGES "1"
		SKL_TKN_U32_OBS "768"
		SKL_TKN_U32_IBS "768"
		SKL_TKN_U32_VBUS_ID "0xffffffff"
		SKL_TKN_U32_PARAMS_FIXUP "4"
		SKL_TKN_U32_CONVERTER "4"
		SKL_TKN_U32_PIPE_ID "10"
		SKL_TKN_U32_PIPE_CONN_TYPE "2"
		SKL_TKN_U32_PIPE_PRIORITY "0"
		SKL_TKN_U32_PIPE_MEM_PGS "2"
		SKL_TKN_U32_CAPS_SIZE "0"
		SKL_TKN_U32_PROC_DOMAIN "0"
	}

	tuples."word.in_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_FMT_CH "4"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
		SKL_TKN_U32_FMT_CH_CONFIG "0x5"
	}

	tuples."word.out_fmt_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_FMT_CH "4"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
		SKL_TKN_U32_FMT_CH_CONFIG "0x5"
	}

	tuples."word.out_fmt_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_FMT_CH "4"
		SKL_TKN_U32_FMT_FREQ "48000"
		SKL_TKN_U32_FMT_BIT_DEPTH "32"
		SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
		SKL_TKN_U32_FMT_INTERLEAVE "0"
		SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
		SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
		SKL_TKN_U32_FMT_CH_CONFIG "0x5"
	}

	tuples."word.in_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "0"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_0" {
		SKL_TKN_U32_DIR_PIN_COUNT "1"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}

	tuples."word.out_pin_1" {
		SKL_TKN_U32_DIR_PIN_COUNT "17"
		SKL_TKN_U32_PIN_MOD_ID "0"
		SKL_TKN_U32_PIN_INST_ID "0"
	}
}

SectionVendorTuples."lib_data num_desc" {
	tokens "skl_tokens"

	tuples."byte.u8_num_blocks" {
		SKL_TKN_U8_NUM_BLOCKS "1"
	}
}

SectionVendorTuples."lib_data_size_desc" {
	tokens "skl_tokens"
	tuples."byte.u8_block_type"{
		SKL_TKN_U8_BLOCK_TYPE "0"
	}
	tuples."short.u16_size_desc"{
		SKL_TKN_U16_BLOCK_SIZE "56"
	}
}

SectionVendorTuples."lib_data" {
	tokens "skl_tokens"

	tuples."word.lib_name" {
		SKL_TKN_U32_LIB_COUNT "1"
	}

	tuples."string.lib_name_0" {
		SKL_TKN_STR_LIB_NAME "base_fw"
	}

}


SectionData."media0_in cpr 0 num_desc" {
	tuples "media0_in cpr 0 num_desc"
}

SectionData."media0_in cpr 0_size_desc" {
	tuples "media0_in cpr 0_size_desc"
}

SectionData."media0_in cpr 0" {
	tuples "media0_in cpr 0"
}

SectionData."media0_in mi num_desc" {
	tuples "media0_in mi num_desc"
}

SectionData."media0_in mi_size_desc" {
	tuples "media0_in mi_size_desc"
}

SectionData."media0_in mi" {
	tuples "media0_in mi"
}

SectionData."codec0_in cpr 1 num_desc" {
	tuples "codec0_in cpr 1 num_desc"
}

SectionData."codec0_in cpr 1_size_desc" {
	tuples "codec0_in cpr 1_size_desc"
}

SectionData."codec0_in cpr 1" {
	tuples "codec0_in cpr 1"
}

SectionData."codec0_in mi num_desc" {
	tuples "codec0_in mi num_desc"
}

SectionData."codec0_in mi_size_desc" {
	tuples "codec0_in mi_size_desc"
}

SectionData."codec0_in mi" {
	tuples "codec0_in mi"
}

SectionData."codec0_out mo num_desc" {
	tuples "codec0_out mo num_desc"
}

SectionData."codec0_out mo_size_desc" {
	tuples "codec0_out mo_size_desc"
}

SectionData."codec0_out mo" {
	tuples "codec0_out mo"
}

SectionData."codec0_out cpr 2 num_desc" {
	tuples "codec0_out cpr 2 num_desc"
}

SectionData."codec0_out cpr 2_size_desc" {
	tuples "codec0_out cpr 2_size_desc"
}

SectionData."codec0_out cpr 2" {
	tuples "codec0_out cpr 2"
}

SectionData."media0_out mo num_desc" {
	tuples "media0_out mo num_desc"
}

SectionData."media0_out mo_size_desc" {
	tuples "media0_out mo_size_desc"
}

SectionData."media0_out mo" {
	tuples "media0_out mo"
}

SectionData."media0_out cpr 3 num_desc" {
	tuples "media0_out cpr 3 num_desc"
}

SectionData."media0_out cpr 3_size_desc" {
	tuples "media0_out cpr 3_size_desc"
}

SectionData."media0_out cpr 3" {
	tuples "media0_out cpr 3"
}

SectionData."dmic01_hifi_in cpr 4 num_desc" {
	tuples "dmic01_hifi_in cpr 4 num_desc"
}

SectionData."dmic01_hifi_in cpr 4_size_desc" {
	tuples "dmic01_hifi_in cpr 4_size_desc"
}

SectionData."dmic01_hifi_in cpr 4" {
	tuples "dmic01_hifi_in cpr 4"
}

SectionData."dmic01_hifi_in mi num_desc" {
	tuples "dmic01_hifi_in mi num_desc"
}

SectionData."dmic01_hifi_in mi_size_desc" {
	tuples "dmic01_hifi_in mi_size_desc"
}

SectionData."dmic01_hifi_in mi" {
	tuples "dmic01_hifi_in mi"
}

SectionData."codec1_out mo num_desc" {
	tuples "codec1_out mo num_desc"
}

SectionData."codec1_out mo_size_desc" {
	tuples "codec1_out mo_size_desc"
}

SectionData."codec1_out mo" {
	tuples "codec1_out mo"
}

SectionData."codec1_out cpr 5 num_desc" {
	tuples "codec1_out cpr 5 num_desc"
}

SectionData."codec1_out cpr 5_size_desc" {
	tuples "codec1_out cpr 5_size_desc"
}

SectionData."codec1_out cpr 5" {
	tuples "codec1_out cpr 5"
}

SectionData."hdmi1_pt_out cpr 6 num_desc" {
	tuples "hdmi1_pt_out cpr 6 num_desc"
}

SectionData."hdmi1_pt_out cpr 6_size_desc" {
	tuples "hdmi1_pt_out cpr 6_size_desc"
}

SectionData."hdmi1_pt_out cpr 6" {
	tuples "hdmi1_pt_out cpr 6"
}

SectionData."hdmi1_pt_out cpr 7 num_desc" {
	tuples "hdmi1_pt_out cpr 7 num_desc"
}

SectionData."hdmi1_pt_out cpr 7_size_desc" {
	tuples "hdmi1_pt_out cpr 7_size_desc"
}

SectionData."hdmi1_pt_out cpr 7" {
	tuples "hdmi1_pt_out cpr 7"
}

SectionData."hdmi2_pt_out cpr 8 num_desc" {
	tuples "hdmi2_pt_out cpr 8 num_desc"
}

SectionData."hdmi2_pt_out cpr 8_size_desc" {
	tuples "hdmi2_pt_out cpr 8_size_desc"
}

SectionData."hdmi2_pt_out cpr 8" {
	tuples "hdmi2_pt_out cpr 8"
}

SectionData."hdmi2_pt_out cpr 9 num_desc" {
	tuples "hdmi2_pt_out cpr 9 num_desc"
}

SectionData."hdmi2_pt_out cpr 9_size_desc" {
	tuples "hdmi2_pt_out cpr 9_size_desc"
}

SectionData."hdmi2_pt_out cpr 9" {
	tuples "hdmi2_pt_out cpr 9"
}

SectionData."hdmi3_pt_out cpr 10 num_desc" {
	tuples "hdmi3_pt_out cpr 10 num_desc"
}

SectionData."hdmi3_pt_out cpr 10_size_desc" {
	tuples "hdmi3_pt_out cpr 10_size_desc"
}

SectionData."hdmi3_pt_out cpr 10" {
	tuples "hdmi3_pt_out cpr 10"
}

SectionData."hdmi3_pt_out cpr 11 num_desc" {
	tuples "hdmi3_pt_out cpr 11 num_desc"
}

SectionData."hdmi3_pt_out cpr 11_size_desc" {
	tuples "hdmi3_pt_out cpr 11_size_desc"
}

SectionData."hdmi3_pt_out cpr 11" {
	tuples "hdmi3_pt_out cpr 11"
}

SectionData."mch_cap_in cpr 12 num_desc" {
	tuples "mch_cap_in cpr 12 num_desc"
}

SectionData."mch_cap_in cpr 12_size_desc" {
	tuples "mch_cap_in cpr 12_size_desc"
}

SectionData."mch_cap_in cpr 12" {
	tuples "mch_cap_in cpr 12"
}

SectionData."mch_cap_in cpr 13 num_desc" {
	tuples "mch_cap_in cpr 13 num_desc"
}

SectionData."mch_cap_in cpr 13_size_desc" {
	tuples "mch_cap_in cpr 13_size_desc"
}

SectionData."mch_cap_in cpr 13" {
	tuples "mch_cap_in cpr 13"
}

SectionData."lib_data num_desc" {
	tuples "lib_data num_desc"
}

SectionData."lib_data_size_desc" {
	tuples "lib_data_size_desc"
}

SectionData."lib_data" {
	tuples "lib_data"
}


SectionControlMixer."media0_in mi Switch" {
	index"0"
	invert "false"
	max "1"
	min"0"
	no_pm "true"
	channel."fl" {
		reg "-1"
		shift "0"
	}
	channel."fr" {
		reg "-1"
		shift "0"
	}
	ops."ctl" {
		get "64"
		put "64"
		info "64"
	}
}
SectionControlMixer."dmic01_hifi_in mi Switch" {
	index"0"
	invert "false"
	max "1"
	min"0"
	no_pm "true"
	channel."fl" {
		reg "-1"
		shift "0"
	}
	channel."fr" {
		reg "-1"
		shift "0"
	}
	ops."ctl" {
		get "64"
		put "64"
		info "64"
	}
}
SectionControlMixer."codec0_in mi Switch" {
	index"0"
	invert "false"
	max "1"
	min"0"
	no_pm "true"
	channel."fl" {
		reg "-1"
		shift "0"
	}
	channel."fr" {
		reg "-1"
		shift "0"
	}
	ops."ctl" {
		get "64"
		put "64"
		info "64"
	}
}


SectionWidget."media0_in cpr 0" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"media0_in cpr 0 num_desc"
		"media0_in cpr 0_size_desc"
		"media0_in cpr 0"
	]
}
SectionWidget."media0_in mi" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	event_flags "9"
	subseq "10"
	data [
		"media0_in mi num_desc"
		"media0_in mi_size_desc"
		"media0_in mi"
	]
}
SectionWidget."codec0_in cpr 1" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"codec0_in cpr 1 num_desc"
		"codec0_in cpr 1_size_desc"
		"codec0_in cpr 1"
	]
}
SectionWidget."codec0_in mi" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	event_flags "9"
	subseq "10"
	data [
		"codec0_in mi num_desc"
		"codec0_in mi_size_desc"
		"codec0_in mi"
	]
}
SectionWidget."codec0_in" {
	index"0"
	type"aif_in"
	no_pm "true"
}
SectionWidget."codec0_out mo" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "1"
	event_flags "15"
	subseq "10"
	data [
		"codec0_out mo num_desc"
		"codec0_out mo_size_desc"
		"codec0_out mo"
	]
	mixer [
		"media0_in mi Switch"
		"dmic01_hifi_in mi Switch"
		"codec0_in mi Switch"
	]
}
SectionWidget."codec0_out cpr 2" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"codec0_out cpr 2 num_desc"
		"codec0_out cpr 2_size_desc"
		"codec0_out cpr 2"
	]
}
SectionWidget."codec0_out" {
	index"0"
	type"aif_out"
	no_pm "true"
}
SectionWidget."media0_out mo" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "1"
	event_flags "15"
	subseq "10"
	data [
		"media0_out mo num_desc"
		"media0_out mo_size_desc"
		"media0_out mo"
	]
	mixer [
		"media0_in mi Switch"
		"dmic01_hifi_in mi Switch"
		"codec0_in mi Switch"
	]
}
SectionWidget."media0_out cpr 3" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"media0_out cpr 3 num_desc"
		"media0_out cpr 3_size_desc"
		"media0_out cpr 3"
	]
}
SectionWidget."dmic01_hifi_in cpr 4" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"dmic01_hifi_in cpr 4 num_desc"
		"dmic01_hifi_in cpr 4_size_desc"
		"dmic01_hifi_in cpr 4"
	]
}
SectionWidget."dmic01_hifi_in mi" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	event_flags "9"
	subseq "10"
	data [
		"dmic01_hifi_in mi num_desc"
		"dmic01_hifi_in mi_size_desc"
		"dmic01_hifi_in mi"
	]
}
SectionWidget."dmic01_hifi" {
	index"0"
	type"aif_in"
	no_pm "true"
}
SectionWidget."codec1_out mo" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "1"
	event_flags "15"
	subseq "10"
	data [
		"codec1_out mo num_desc"
		"codec1_out mo_size_desc"
		"codec1_out mo"
	]
	mixer [
		"media0_in mi Switch"
		"dmic01_hifi_in mi Switch"
		"codec0_in mi Switch"
	]
}
SectionWidget."codec1_out cpr 5" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"codec1_out cpr 5 num_desc"
		"codec1_out cpr 5_size_desc"
		"codec1_out cpr 5"
	]
}
SectionWidget."codec1_out" {
	index"0"
	type"aif_out"
	no_pm "true"
}
SectionWidget."hdmi1_pt_out cpr 6" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"hdmi1_pt_out cpr 6 num_desc"
		"hdmi1_pt_out cpr 6_size_desc"
		"hdmi1_pt_out cpr 6"
	]
}
SectionWidget."hdmi1_pt_out cpr 7" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"hdmi1_pt_out cpr 7 num_desc"
		"hdmi1_pt_out cpr 7_size_desc"
		"hdmi1_pt_out cpr 7"
	]
}
SectionWidget."iDisp1_out" {
	index"0"
	type"aif_out"
	no_pm "true"
}
SectionWidget."hdmi2_pt_out cpr 8" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"hdmi2_pt_out cpr 8 num_desc"
		"hdmi2_pt_out cpr 8_size_desc"
		"hdmi2_pt_out cpr 8"
	]
}
SectionWidget."hdmi2_pt_out cpr 9" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"hdmi2_pt_out cpr 9 num_desc"
		"hdmi2_pt_out cpr 9_size_desc"
		"hdmi2_pt_out cpr 9"
	]
}
SectionWidget."iDisp2_out" {
	index"0"
	type"aif_out"
	no_pm "true"
}
SectionWidget."hdmi3_pt_out cpr 10" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"hdmi3_pt_out cpr 10 num_desc"
		"hdmi3_pt_out cpr 10_size_desc"
		"hdmi3_pt_out cpr 10"
	]
}
SectionWidget."hdmi3_pt_out cpr 11" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"hdmi3_pt_out cpr 11 num_desc"
		"hdmi3_pt_out cpr 11_size_desc"
		"hdmi3_pt_out cpr 11"
	]
}
SectionWidget."iDisp3_out" {
	index"0"
	type"aif_out"
	no_pm "true"
}
SectionWidget."mch_cap_in cpr 12" {
	index"0"
	type"mixer"
	no_pm "true"
	event_type "3"
	event_flags "9"
	data [
		"mch_cap_in cpr 12 num_desc"
		"mch_cap_in cpr 12_size_desc"
		"mch_cap_in cpr 12"
	]
}
SectionWidget."mch_cap_in cpr 13" {
	index"0"
	type"pga"
	no_pm "true"
	event_type "4"
	data [
		"mch_cap_in cpr 13 num_desc"
		"mch_cap_in cpr 13_size_desc"
		"mch_cap_in cpr 13"
	]
}
SectionManifest."lib_data" {
	data [
		"lib_data num_desc"
		"lib_data_size_desc"
		"lib_data"
	]
}

SectionGraph."Pipeline 1 Graph" {
	index"0"
	lines [
		"media0_in mi, , media0_in cpr 0"
		"media0_in cpr 0, , System Playback"
		"codec0_in mi, , codec0_in cpr 1"
		"codec0_in cpr 1, , codec0_in"
		"codec0_out mo, media0_in mi Switch, media0_in mi"
		"codec0_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
		"codec0_out mo, codec0_in mi Switch, codec0_in mi"
		"codec0_out cpr 2, , codec0_out mo"
		"codec0_out, , codec0_out cpr 2"
		"media0_out mo, media0_in mi Switch, media0_in mi"
		"media0_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
		"media0_out mo, codec0_in mi Switch, codec0_in mi"
		"media0_out cpr 3, , media0_out mo"
		"System Capture, , media0_out cpr 3"
		"dmic01_hifi_in mi, , dmic01_hifi_in cpr 4"
		"dmic01_hifi_in cpr 4, , dmic01_hifi"
		"codec1_out mo, media0_in mi Switch, media0_in mi"
		"codec1_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
		"codec1_out mo, codec0_in mi Switch, codec0_in mi"
		"codec1_out cpr 5, , codec1_out mo"
		"codec1_out, , codec1_out cpr 5"
		"hdmi1_pt_out cpr 7, , hdmi1_pt_out cpr 6"
		"hdmi1_pt_out cpr 6, , HDMI1 Playback"
		"iDisp1_out, , hdmi1_pt_out cpr 7"
		"hdmi2_pt_out cpr 9, , hdmi2_pt_out cpr 8"
		"hdmi2_pt_out cpr 8, , HDMI2 Playback"
		"iDisp2_out, , hdmi2_pt_out cpr 9"
		"hdmi3_pt_out cpr 11, , hdmi3_pt_out cpr 10"
		"hdmi3_pt_out cpr 10, , HDMI3 Playback"
		"iDisp3_out, , hdmi3_pt_out cpr 11"
		"mch_cap_in cpr 13, , mch_cap_in cpr 12"
		"DMIC Capture, , mch_cap_in cpr 13"
		"mch_cap_in cpr 12, , dmic01_hifi"
	]
}